In Association with
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| Date: |
November 15th - 19th, 2010 |
| Location: |
5426 Bay Center Dr., Suite 700
Tampa, FL 33609
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| Contact: |
Acceleware
403.471.2798, services@acceleware.com |
| Cost: |
$4000 USD |
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Space is limited - Please register early to guarantee your spot
Your Instructor
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Dan Cyca - Director of Engineering
Dan joined Acceleware's software development team in 2004 to implement the company's first product and now manages the development group. His previous experience includes developing 'C-to-hardware' compilers, and implementing digital signal processing and encryption algorithms on FPGAs.
Dan has a M. Sc. in Electrical Engineering from the University of Calgary.
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Schedule
Mon-Thu: 9:00AM – 5:00PM (incl. 1 hour lunch)
Fri: 9:00AM – 12:00PM
Agenda
- Day 1:
- Lecture: Overview of GPU Computing
- Hands-on-Exercise: Memory Allocation and Memory Transfers
- Lecture: Data-Parallel Architectures and the CUDA Programming Model
- Hands-on-Exercise: Simple Kernels
- Lecture: The CUDA Memory Model & Thread Cooperation
- Hands-on-Exercise: Shared Memory and Constant Memory
- Day 2:
- Lecture and Hands-on-Exercise: Textures
- Lecture and Hands-on-Exercise: Asynchronous Operations
- Lecture: Other GPU Features
- Lecture: Libraries
- Lecture: Debugging GPU Programs
- Hands-on-Exercise: Debugging Tools and Techniques
- Day 3:
- Lecture: Introduction to Optimization
- Hands-on-Exercise: Arithmetic Optimization
- Lecture: Resource Management, Latency and Occupancy
- Lecture and Hands-onExercise: Memory Performance Optimizations
- Day 4 & 5:
- More Hands-on-Exercises: Building GPU Prototypes and Specific client applications
- Running on servers and clusters
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All lectures are a combination of teaching and hands-on tutorials
NVIDIA’s foundational training material is augmented with Acceleware’s experience over
the past 5.5 years and with examples specific to an HPC audience
